Digital Logic Circuits Mock Test

1. Any signed negative binary number is recognised by its

2. The way to speed up DTL is to add an across intermediate resister is

3. An important drawback of binary system is

4. The full form of CTDL is

5. Compatibility refers to

6. The DTL propagation delay is relatively

7. A major advantage of DTL over the earlier resistor-transistor logic is the

8. A disadvantage of DTL is

9. Which of the following tool performs logic optimization?

10. The first CML logic was introduced by General Electric in

11. The decimal equivalent of the octal number (645)8 is

12. The quantity of double word is

13. To increase fan-out of the gate in DTL

14. Which flip-flop is usually used in the implementation of the registers?

15. The process to avoid saturating the switching transistor is performed by

16. What does RTL in digital circuit design stand for?

17. RTL is used in HDL to create what level of representations in the circuit?

18. All input of NOR as low produces result as.

19. RTL mainly focuses on describing the flow of signals between

20. Hold time is the time needed for the data to after the edge of the clock is triggered.

21. The method of connecting a driving device to a loading device is known as

22. RTL is a design abstraction of what kind of circuit?

23. Simulator enters in which phase after the initialization phase?

24. The largest two digit hexadecimal number is

25. Schottky families prevent the saturating using

26. All input of NOR as low produces result as

27. Motorola has offered MECL circuits in logic families.

28. In RTL NOR gate, the output is at logic 1 only when all the inputs are at

29. Why latches are called a memory devices?

30. The full form of CMOS is

31. Whose operations are more faster among the following?

32. The full form of MECL is

33. The output of latches will remain in set/reset untill

34. The basic idea of basic CML circuit came from an

35. How many types of sequential circuits are?

36. The latest entrant to the ECL family is

37. The basic latch consists of

38. In S-R flip-flop, if Q = 0 the output is said to be

39. What is a trigger pulse?

40. A latch is an example of a

41. CMOS is also sometimes referred to as

42. Latch is a device with

43. How many types of latches are __

44. The full form of COS-MOS is

45. The sequential circuit is also called

46. Two stable states of latches are

47. CMOS technology is used in

48. The first step of analysis procedure of SR latch is to

49. The full form of MOS is

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